Program editor / LAD
STOP20 ms scanTraffic Light
Project explorer
Local PLCBrowser simulation · BOOL
Program blocks 8
Local simulationNo controller connected
Task / brief
Goal
Run an autonomous Red→Green→Yellow→Red cycle with fixed dwell times, and guarantee the lights are interlocked (never conflicting).
Inputs / outputs
NO physical button: released = 0
NC physical button: released = 1
Hints
Main [LAD]Modified
Network 1
Properties coil · 2 paths
Contacts & branches
Path 1
1
2
Path 2
1
2
Output instruction
Q 0
Network 2
Properties TON · 1 path
Contacts & branches
Path 1
1
2
Output instruction
Q 0
Network 3
Properties TON · 1 path
Contacts & branches
Path 1
1
2
Output instruction
Q 0
Network 4
Properties TON · 1 path
Contacts & branches
Path 1
1
2
Output instruction
Q 0
Network 5
Properties coil · 3 paths
Contacts & branches
Path 1
1
2
3
Path 2
1
2
Path 3
1
Output instruction
Q 0
Network 6
Properties coil · 2 paths
Contacts & branches
Path 1
1
2
3
Path 2
1
2
3
Output instruction
Q 0
Network 7
Properties coil · 2 paths
Contacts & branches
Path 1
1
2
3
Path 2
1
2
3
Output instruction
Q 0
Network 8
Properties coil · 1 path
Contacts & branches
Path 1
1
Output instruction
Q 0
Network 9
Properties coil · 1 path
Contacts & branches
Path 1
1
Output instruction
Q 0
Network 10
Properties coil · 1 path
Contacts & branches
Path 1
1
Output instruction
Q 0
10 networks · 12 tagsSelect a symbol to edit its properties
PLC tags / I/O table (12/64)
%I Input · %Q Output · %M Internal bit / byte.bit (0–7)
Address naming rules
| Area | Meaning | Example |
|---|---|---|
%I | Input | %I0.0, %I0.1 |
%Q | Output | %Q0.0, %Q1.0 |
%M | Internal bit | %M0.0, %M0.1 |
- Format: %areaByte.bit. Bytes: 0–65535; bits: 0–7. After %I0.7 comes %I1.0, not %I0.8.
- Enter I1.2 or i1.2 to normalize to %I1.2. Addresses must match the direction and be unique.
- Symbol names appear above ladder elements; addresses appear below. All contacts bound to a variable share its address.
- These BOOL addresses are for simulation. The byte limit does not describe every physical CPU.
| Symbol | Address | Direction | Type | Initial | Live | Comment | |
|---|---|---|---|---|---|---|---|
| Start | BOOL | ||||||
| StopOK | BOOL | ||||||
| run | BOOL | ||||||
| p1 | BOOL | ||||||
| p2 | BOOL | ||||||
| p3 | BOOL | ||||||
| t1q | BOOL | ||||||
| t2q | BOOL | ||||||
| t3q | BOOL | ||||||
| Red | BOOL | ||||||
| Green | BOOL | ||||||
| Yellow | BOOL |
Addresses are saved with the project. Existing tags keep their addresses when another tag is deleted. Exercise IDs keep their physical role.
Simulation / live I/O
Device feedback
StoppedVariable table
12| Name | Address | Value | Control |
|---|---|---|---|
| Start | %I0.0 | 0 | |
| Stop (normal) | %I0.1 | 1 | |
| Running | %M0.0 | 0 | |
| Red phase | %M0.1 | 1 | |
| Green phase | %M0.2 | 0 | |
| Yellow phase | %M0.3 | 0 | |
| T1 done | %M0.4 | 0 | |
| T2 done | %M0.5 | 0 | |
| T3 done | %M0.6 | 0 | |
| Red light | %Q0.0 | 1 | |
| Green light | %Q0.1 | 0 | |
| Yellow light | %Q0.2 | 0 |
Addresses are virtual teaching tags.
Diagnostics / verification6 cases
Test 1 of 6
Entire suite · isolated engines · results clear on edit
Test 1: Idle: Red on, others off
Click Run test to evaluate the entire suite.